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QuickLogic Announces Strategic Process for SensiML
Tuesday, 7th January at 6:00 am
SAN JOSE, Calif., Jan. 7, 2025 /PRNewswire/ -- QuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP and ruggedized FPGAs, today announced its Board of Directors is actively exploring options for its wholly-owned subsidiary, SensiML. Preliminary discussions are underway with potential strategic partners regarding the possible sale of SensiML or its assets.
With the increasing interest in applying Artificial Intelligence (AI) and Machine Learning (ML) in edge applications, there are clearly defined opportunities for SensiML's future growth. However, with the success of QuickLogic's eFPGA Hard IP and ruggedized FPGA business, the Company will focus all its resources on leveraging and growing the cornerstones of its core business model.
This decision has been influenced by recent events, including eFPGA Hard IP design wins with strategic customers, expansion of large government ruggedized FPGA and eFPGA Hard IP contracts, performance improvements of its eFPGA Hard IP products, the recent change in the eFPGA market competitor landscape, and an increase in inbound interest from customers of former eFPGA market competitors.
Tuesday, 7th January at 6:00 am
SAN JOSE, Calif., Jan. 7, 2025 /PRNewswire/ -- QuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP and ruggedized FPGAs, today announced its Board of Directors is actively exploring options for its wholly-owned subsidiary, SensiML. Preliminary discussions are underway with potential strategic partners regarding the possible sale of SensiML or its assets.
With the increasing interest in applying Artificial Intelligence (AI) and Machine Learning (ML) in edge applications, there are clearly defined opportunities for SensiML's future growth. However, with the success of QuickLogic's eFPGA Hard IP and ruggedized FPGA business, the Company will focus all its resources on leveraging and growing the cornerstones of its core business model.
This decision has been influenced by recent events, including eFPGA Hard IP design wins with strategic customers, expansion of large government ruggedized FPGA and eFPGA Hard IP contracts, performance improvements of its eFPGA Hard IP products, the recent change in the eFPGA market competitor landscape, and an increase in inbound interest from customers of former eFPGA market competitors.
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