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In September 2017, the U.S. Department of Defense Advanced Research Projects Agency (DARPA) official website, suddenly appeared a "heterogeneous integration to promote the development of Chiplet" news, blowing a pool of spring water in the industry, DARPA said that CMOS technology, although the realization of digital, analog and mixed-signal module SoC integration, but also lead to the cost associated with chip design, manufacturing, and the U.S. Department of Defense budget can not afford the cost of a single chip SoC. SoC integration, but also led to and chip design, manufacturing-related costs continue to push up, and the U.S. Department of Defense's budget can not afford a single SoC cost of a sharp rise, in order to strengthen the flexibility of the chip design system, and reduce the chip iteration of the design time, the need to find a new paradigm of "IP reuse".

Dan Green, the program manager who led the initiative, said at the time that Chiplet could mix and match chip design and manufacturing mindsets, skills, technical strengths and business interests. "If the program is successful, we will have access to a wider range of specialized modules that we will be able to integrate into our systems more easily and at lower cost. This should be a win-win for both the commercial and defense sectors."

In a nutshell, the U.S. Department of Defense's military this particular application scenario, can not allow its suppliers to go "volume" mode, how to reduce procurement costs, is DARPA opened Chiplet program's original intention. Initially joined the program's main contractors include four major semiconductor companies Intel, Micron Technology, and two EDA companies New Idea Technology and Cadence, in addition to a number of military chip contractors. $Taiwan Semiconductor (TSM.US)$ $Direxion Daily Semiconductor Bull 3x Shares ETF (SOXL.US)$