SureCore Teams With Sarcina to Package Cryo Chips
SureCore Teams With Sarcina to Package Cryo Chips
SHEFFIELD, England and PALO ALTO, Calif., Dec. 17, 2024 /PRNewswire/ -- Further to sureCore's recent announcement about its launch of a range of cryogenic IP following the successful evaluation of test chips in both 180 nm and 22nm process nodes, the company has revealed that it has teamed with packaging experts, Sarcina, who designed a custom package specifically for use at cryogenic temperatures.
英国谢菲尔德和加州帕洛阿尔托,2024年12月17日 /PRNewswire/ -- 在sureCore最近宣布其推出一系列低温知识产权(IP)之后,该公司透露与包装专家Sarcina合作,后者专门设计了一种专门用于低温的定制封装,以便在180nm和22nm工艺节点上成功评估测试芯片。
Paul Wells, sureCore's CEO, explained, "This represents another critical step in our programme to make Cryo-CMOS available for the Quantum Computing (QC) ecosystem. Our CryoMem range of memory IP is silicon proven in addition to validating our library recharacterization service. We are also offering a range of cryogenic design capabilities to help QC companies design the control/interface chips which need to be migrated into the cryostat alongside the qubits. Reliable, robust, cryo-ready chip packaging is a necessity in these harsh, low temperature environments and to ensure this we partnered with Sarcina whose specialist package design expertise is second to none."
sureCore首席执行官Paul Wells解释道:“这代表了我们将Cryo-CMOS引入量子计算(QC)生态系统的计划中的另一个关键步骤。我们的CryoMem内存IP在硅上经过验证,并且验证了我们的库重特性服务。我们还提供了一系列低温设计能力,以帮助QC公司设计需要与量子比特一起迁移到低温箱中的控制/接口芯片。在这些严苛的低温环境中,可靠、稳健、适合低温的芯片封装是必需的,为此我们与Sarcina合作,后者在封装设计方面的专业知识无与伦比。”
Larry Zu, Sarcina's CEO, added, "We have developed a reputation as the "go-to" design expert for companies needing to push the boundaries of current packaging technology. Whether this be for complex multi-chip 3D solutions, or, as in this case, for extreme low temperature operation, our experience and know-how allowed us to develop a custom BGA package specially for cryogenic temperatures."
Sarcina首席执行官Larry Zu补充道:“我们已经建立了作为需要推动当前封装技术边界的公司的‘首选’设计专家的声誉。无论是复杂的多芯片3D解决方案,还是在这种情况下的极低温操作,我们的经验和专业知识使我们能够为低温开发特别的定制BGA封装。”
Innovate UK project background
The IUK-funded consortium is a complete ecosystem of companies with the expertise and core competencies required to develop cryo-tolerant semiconductor IP. The aim of the project is to develop and prove a suite of foundation IP that can be licenced to designers allowing them to create their own Cryo-CMOS SoC solutions. By doing so, their competitive edge in the Quantum Computing space will be dramatically accelerated.
创新英国项目背景
该由IUk资助的财团是一个完整的公司生态系统,具备开发耐低温半导体知识产权的专业知识和核心能力。该项目的目的是开发和证明一套基础知识产权,可以授权设计者,使他们能够创建自己的Cryo-CMOS SoC解决方案。通过这样做,他们在量子计算领域的竞争优势将获得极大提升。
sureCore has exploited its state-of-the-art, ultra-low power memory design skills to create embedded Static Random Access Memory (SRAM), an essential building block for any digital sub-system, that is capable of operating from 77K (-196°C) down to the near absolute zero temperatures needed by Quantum Computers (QCs). In addition, both standard cell and IO cell libraries have been re-characterised for operation at cryogenic temperatures thereby enabling an industry standard RTL to GDSII physical design flow to be readily adopted.
sureCore利用其尖端的超低功耗内存设计技术,创建了嵌入式静态随机存取内存(SRAM),这是任何数字子系统不可或缺的构建模块,它能够在7.7万(-196°C)到量子计算机(QC)所需的接近绝对零度的温度下工作。此外,标准单元和IO单元库也已重新特性化,以便在低温下工作,从而使行业标准RTL到GDSII的物理设计流程能够被迅速采用。
A key barrier to QC scaling is being able to collocate ever increasingly complex control electronics close to the qubits that must be housed at cryogenic temperatures in a cryostat. In doing so, it is essential that the control chip power consumption is kept as low as possible to ensure that excess heat is kept to a minimum so it does not cause additional thermal load on the cryostat. Here, sureCore's low power design expertise proved pivotal.
量子计算扩展的一个主要障碍是能够将日益复杂的控制电子设备放置在需要在低温(即冷却设备内)储存的量子比特附近。在这样做时,必须尽量降低控制芯片的功耗,以确保额外的热量降到最低,从而不对冷却设备造成额外的热负荷。在这里,sureCore的低功耗设计专长表现得尤为关键。
Current QC designs have the control electronics located outside the cryostat as modern semiconductor technology is only qualified to work down to -40°C. As the temperature is reduced close to absolute zero the operating characteristics of the transistors change markedly. Measuring, understanding and modelling this behavioural change over the past months showcases the potential to build interface chips that can control and monitor qubits at cryogenic temperatures.
当前的量子计算设计将控制电子设备放置在冷却设备外,因为现代半导体技术只能在-40°C的温度下正常工作。当温度降低至接近绝对零度时,晶体管的工作特性会显著变化。在过去几个月中,测量、理解和建模这一行为变化展示了能够构建接口芯片的潜力,这些芯片可以在低温下控制和监测量子比特。
At the moment, expensive bulky cabling connects room temperature control electronics to the qubits housed in the cryostat. Enabling QC developers to be able to exploit the fabless design paradigm and create their own custom cryogenic control SoCs, which can be housed with the qubits inside the cryostat, is a game-changer that will rapidly enable QC scaling. Immediate benefits include cost, size and, most importantly, latency reduction. The next step will be characterising the demonstrator chip at cryo temperatures to further refine and validate the models to help improve the performance."
目前,昂贵的笨重电缆将室温控制电子设备与冷却设备中的量子比特连接起来。使量子计算开发者能够利用无工厂设计范式,创造自己的定制低温控制系统芯片(SoC),这些芯片可以与量子比特一起放置在冷却设备内,这是一个迅速推动量子计算扩展的变革。直接好处包括成本、体积,以及最重要的,延迟的减少。下一步将是在低温下对演示芯片进行特性测试,以进一步完善和验证模型,以帮助提高性能。
About sureCore
sureCore is the Low Power leader that empowers the IC design community to meet their aggressive power budgets through a portfolio of innovative, ultra-low power memory design services and standard products. sureCore's low-power engineering methodologies and design flows helps you meet your most exacting memory requirements with customized low power SRAM IP and low power mixed signal design services that create clear marketing differentiation. The company's low-power product line encompasses a range of down to near-threshold silicon proven, process-independent SRAM IP.
关于sureCore
sureCore是低功耗领域的领导者,通过一系列创新的超低功耗内存设计服务和标准产品,赋能集成电路设计社区以满足其严格的功耗预算。sureCore的低功耗工程方法和设计流程帮助您以定制的低功耗SRAm知识产权和低功耗混合信号设计服务满足您最苛刻的内存要求,从而创造明确的市场差异化。该公司的低功耗产品系列涵盖了一系列接近阈值的硅验证、工艺无关的SRAm知识产权。
For more information, visit sure-core.com
欲了解更多信息,请访问sure-core.com
Media Contact:
Nigel Robson, Vortex PR
Email: [email protected]
Phone: +44 1481 233080
媒体联系人:
奈杰尔·罗布森,涡旋公关
邮箱:[email protected]
电话:+44 1481 233080
About Sarcina Technology
Founded in 2011, Sarcina Technology specializes in advanced semiconductor package design for high-performance computing AI chips and high-performance communication silicon photonics chips. The company also offers a comprehensive, one-stop solution for semiconductor packaging, testing, qualification, and production. With a proven track record of 100% "right-the-first-time" advanced packaging, Sarcina Technology delivers wafer-to-production services that minimize overhead and accelerate time-to-volume.
关于Sarcina科技
Sarcina科技成立于2011年,专注于针对高性能计算人工智能芯片和高性能通信硅光子芯片的先进半导体封装设计。公司还提供全面的一站式半导体封装、测试、认证和生产解决方案。凭借100%"一次成功"的先进封装的良好记录,Sarcina科技提供从晶圆到生产的服务,最大限度地减少开销,加快交付时间。
For more information, visit sarcinatech.com.
欲了解更多信息,请访问sarcinatech.com。
Media Contact
Larry Zu
Email: [email protected]
Phone: +1-650-681-9157
媒体联系
拉里·祖
邮箱:[email protected]
电话: +1-650-681-9157
SOURCE Sarcina Technology LLC
来源: Sarcina科技有限公司