此外，英特尔代工还披露了一种用于先进封装的异构集成解决方案，能够将吞吐量提升高达100倍，实现超快速的芯片间封装（chip-to-chip assembly）。（文猛）Sina Technology News, December 12, at noon. Recently, Intel Foundry announced a major breakthrough in in-chip interconnection technology. Through the company's latest subtractive ruthenium interconnect technology (subtractive Ruthenium), inter-line capacitance can be reduced by up to 25%, effectively improving in-chip interconnection.
According to reports, subtractive ruthenium interconnect technology has achieved significant progress in interconnection miniaturization by using ruthenium, a new, critical, and alternative metallized material, using thin film resistivity (thin film resistivity) and air gap (airgap). The process does not require expensive lithographic airgap zones (lithographic airgap exclusion zones) around the holes, and also avoids the use of selectively etched self-aligned vias (self-aligned vias). When the spacing is less than or equal to 25 nm, the air gap achieved using subtractive ruthenium interconnect technology reduces inter-line capacitance by up to 25%, and can be used as a metallization solution to replace the copper inlay process in tight spacing layers.
It is reported that this solution is expected to be applied in future process nodes of Intel's foundry.
In addition, Intel Foundry also revealed a heterogeneous integrated solution for advanced packaging, which can increase throughput by up to 100 times and achieve ultra-fast chip-to-chip assembly (chip-to-chip assembly). (Wen Meng)
